1. Technical Field
Embodiments of the present disclosure relate to semiconductor devices.
2. Related Art
In general, a semiconductor device may be designed to include an active mode and a standby mode. In the active mode, the semiconductor device may receive a command signal to execute a read operation for outputting data stored therein or a write operation for inputting external data. In the standby mode, the semiconductor device may maintain an idle state without execution of the read operation and the write operation.
In the active mode, the semiconductor device may receive a read command signal or a write command signal to activate a word line selected by an address signal for outputting internal data or for inputting external data. In the standby mode, the semiconductor device may maintain an idle state with minimum power consumption.
Meanwhile, the semiconductor device may operate in the standby mode after the active mode. In such a case, the standby mode may start after a certain time elapses from a moment that the active mode terminates. That is, the semiconductor device may be designed such that an internal signal generated in response to the command signal is delayed by a predetermined time and the standby mode starts at a moment that the delayed internal signal is generated. Thus, the semiconductor device may be designed to include a delay circuit that retards the command signal to generate the internal signal.